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r em6152a copyright ? 2006, em microelectronic-marin sa 1 www.emmicroelectronic.com 06/06, rev. b, prelim. 5v automotive regulator with windowed watchdog description the em6152a offers a high level of integration by combining voltage regulation, voltage monitoring and software monitoring using a windowed watchdog. a comparator monitors the voltage applied at the v in input comparing it with an internal voltage reference v ref . the power-on reset function is initialized after v in reaches v ref and takes the reset output inactive after a delay t por depending on external resistance r osc . the reset output goes active low when the v in voltage is less than v ref . the res and en outputs are guaranteed to be in a correct state for a regulated output voltage as low as 1.2 v. the watchdog function monitors software cycle time and execution. if software clears the watchdog too quickly (incorrect cycle time) or too slowly (incorrect execution) it will cause the system to be reset. for enha nced security, the watchdog must be serviced within an ?open? time window. during the remaining time, the watchdog time window is ?closed? and a reset will occur should a tcl pulse be received by the watchdog during this ?closed? time window. the ratio of the open/closed window is either 33%/67% or 67%/33%. the system enable output prevents critical control functions being activated until software has successfully cleared the watchdog three times. such a security could be used to prevent motor controls being energized on repeated resets of a faulty system. when the microcontroller goes in stand-by mode or stops working, no signal is received on the tcl input of the em6152a (version 55) and it goes into a stand-by mode in order to save power (can-bus sleep detector). in em6152a, the voltage regulator has a low dropout voltage and a low quiescent current of 90 a. the quiescent current increases only slightly in dropout prolonging battery life. built- in protection includes a positiv e transient absorber for up to 45 v (load dump) and the ability to survive an unregulated input voltage of -42 v (reverse battery). the input may be connected to ground or to a reverse voltage without reverse current flowing from the output to the input. features ? low quiescent current 90 a ? -40c to +125c temperature range ? highly accurate 5 v, 150 ma guaranteed output (actual maximum current depends on power dissipation) ? low dropout voltage, typically 250 mv at 100 ma ? unregulated dc input can withstand -42 v reverse battery and +45 v power transients ? fully operational for unregulated dc input voltage up to 40 v and regulated output voltage down to 3.5 v ? no reverse output current ? very low temperature coeffici ent for the regulated output ? current limiting ? windowed watchdog with an adjustable time windows, guaranteeing a minimum time and a maximum time between software clearing of the watchdog ? time base accuracy 8% (at 100ms) ? sleep mode function (v55) ? adjustable threshold voltage using external resistors ? adjustable power on reset (por) delay using one external resistor ? open-drain active-low reset output ? reset output guaranteed for regulated output voltage down to 1.2 v ? system enable output offers added security ? qualified according to aec-q100 ? pin out compatible with em6152 ? green so-8 and exposed pad so-16 packages (rohs compliant) applications ? automotive systems ? industrial ? home security systems ? telecom / networking ? computers ? set top boxes typical operating configuration fig. 1 selection table part number v ref closed window open window can-bus sleep detector em6152a 30 1.17 v 67% 33% no em6152a 50 1.52 v 67% 33% no em6152a 53 1.52 v 33% 67% no em6152a 55 1.275 v 67% 33% yes please refer to fig. 4 for more information about the open/closed window of the watchdog. em microelectronic - marin sa 5v + v ss gnd unregulated voltage input output em6152a res en tcl v in microprocessor v dd i/o res i/o r osc 10uf 100nf 22uf r osc r 1 r 2 +
r em6152a copyright ? 2006, em mi croelectronic-marin sa 2 www.emmicroelectronic.com 06/06, rev. b, prelim. ordering information note: the ?+? symbol at the end of the part nu mber means that this product is rohs co mpliant (green). for version v30, please contact em microelectronic. pin assignment and description so8 ex. pad so-16 name function 1 2 en push-pull active low enable output 2 3 res open drain active low reset output. res must be pulled up to v output even if unused 3 4 tcl watchdog timer clear input signal 4 5 v ss gnd terminal 5 12 input voltage regulator input 6 13 output voltage regulator output 7 14 r osc r osc input for rc oscillator tuning 8 15 v in voltage comparator input - 1, 6 to 11, 16 nc no connect - exposed pad can be connected to v ss or left floating block diagram em6152a res en tcl voltage regulator voltage reference voltage reference current controlled oscillator - + v ref comparator reset control timer enable logic input v in r osc output open drain output res fig. 3 part number version v ref package delivery form package marking EM6152A30SO8A+ stick, 97 pcs em6152a30so8b+ v30 1.170 v so-8 tape & reel, 2500 pcs 6152a30 em6152a50so8a+ stick, 97 pcs em6152a50so8b+ so-8 tape & reel, 2500 pcs 6152a50 em6152a50es16b+ v50 1.52 v ex. pad so-16 tape & reel, 2500 pcs em6152a050 em6152a53so8a+ stick, 97 pcs em6152a53so8b+ so-8 tape & reel, 2500 pcs 6152a53 em6152a53es16b+ v53 1.52v ex. pad so-16 tape & reel, 2500 pcs em6152a053 em6152a55so8a+ stick, 97 pcs em6152a55so8b+ v55 1.275 v so-8 tape & reel, 2500 pcs 6152a55 v ss r osc 4 output input res en tcl v in so8 1 3 2 8 6 7 5 em6152a v ss r osc outpu t input res en tcl v in ex. pad so-16 em6152a nc nc nc nc 16 15 14 13 12 11 10 9 1 2 3 4 5 6 7 8 nc nc nc nc
r em6152a copyright ? 2006, em mi croelectronic-marin sa 3 www.emmicroelectronic.com 06/06, rev. b, prelim. absolute maximum ratings parameter symbol conditions continuous voltage at input to v ss v input -0.3 to +40v transients on input for t < 100 ms and duty cycle 1% v trans up to +45v max. voltage at any signal pin v max v output + 0.3v min. voltage at any signal pin v min v ss ? 0.3v reverse supply voltage on input v rev -42v storage temperature t sto -65 to +150 c esd according to mil-std-883 method 3015.7 v smax 2000v table 1 stresses above these listed maximum ratings may cause permanent damages to the device. exposure beyond specified operating co nditions may affect device reliability or cause malfunction. decoupling methods the input capacitor is necessary to compensate the line influences. a resistor of approx. 1 connected in series with the input capacitor may be used to damp the oscillation of the input capacitor and input inductance. the esr value of the capacitor plays a major role regarding the efficiency of the decoupling. it is recommended also to connect a ceramic capacitor (100 nf) directly at the ic's pins. in general the user must assure that pulses on the input line have slew rates lower than 1 v/s. on the output side, the capacitor is necessary for the stability of the regulation circuit. the stability is guaranteed for values of 10 f or greater. it is especially important to choose a capacitor with a low esr value. tantalum capacitors are recommended. see the notes related to table 2. special care must be taken in disturbed environments (automotive, proximity of motors and relays, etc.). handling procedures this device has built-in protection against high static voltages or electric fields; however, it is advised that normal precautions be taken as for any other cmos component. unless otherwise specified, proper operation can only occur when all terminal voltages are kept within the voltage range. at any time, all inputs must be tied to a defined logic voltage level. operating conditions parameter symbol min. max. units operating junction temperature t j -40 +125 c input voltage (note 1, 2) v input 5.5 40 v res and en guaranteed (note 3) v output 1.2 v output current (note 4) i output 150 ma comparator input voltage v in 0 v output v rc-oscillator programming r osc 10 1000 k package therma l resistance from junction to ambient : so-8 exp. pad so-16 150 mils (note 5) r th(j-a) 30 160 90 c/w table 2 note 1: full operation guaranteed. to achieve the l oad regulation specified in table 3 a 22 f capacitor or greater is required on the input, see fig. 1b. the 22 f must have an effective resistance 4 and a resonant frequency above 500 khz. note 2: a 10 f load capacitor and a 100 nf decoupling capacitor are required on the regulator output for stability. the 10 f must have an effective series resistance of 4 and a resonant frequency above 500 khz. note 3: res must be pulled up externally to v output even if it is unused. ( res and en are used as inputs by em test) note 4: the output current will not apply to the full range of input voltage. power dissipation that w ould require the em6152a to wor k above the maximum junction temperature (+125c) must be avoided. note 5: the thermal resistance specified assumes t he package is soldered to a pcb. a typica l value of 51c/w has been obtained with a d ual layer board, with the slug soldered to the heat-sink area of the pcb (see figure 16)
r em6152a copyright ? 2006, em mi croelectronic-marin sa 4 www.emmicroelectronic.com 06/06, rev. b, prelim. electrical characteristics v input = 13.5 v, c l = 10 f + 100 nf, c input = 22 f, t j = -40 to +125c, unless otherwise specified parameter symbol test conditions min. typ. max. unit supply current in standby mode and sleep mode for v55 (note 1) i ss r osc = don?t care, tcl = v output , v in = 0 v, i l = 100 a 80 135 a supply current (note1) i ss r osc = 100 k , i/p s at v output , o/p s 1 m to v output , i l = 100 a 90 140 a supply current i ss r osc = 100 k , i/p s at v output , o/p s 1 m to v output , i l = 50 ma 1.7 4 ma voltage regulator output voltage v output 5 ma i l 100 ma 4.85 5 5.15 v line regulation (note 2) v line 6 v v input 28 v, i l = 1 ma 5 30 mv load regulation (note 2) v l 1 ma i l 100 ma, v input = 6v 50 95 mv dropout voltage (note 3) v dropout i l = 100 ma 250 500 mv current limit i lmax output tied to v ss , v input = 6v 150 200 500 ma supervisory and watchdog res & en v output = 4.5 v, i ol = 8 ma 0.25 0.45 v output low voltage v ol v output = 1.2 v, i ol = 0.5 ma 0.04 0.2 v en v output = 4.5 v, i oh = -1 ma 3.5 4.1 v output high voltage v oh v output = 1.2 v, i oh = -20 a 0.9 1.05 v tcl input low level v il v ss 0.5 v tcl input high level v ih 2.5 v output v tcl leakage current i li v ss v tcl v output 0.05 a version v30 1.135 1.170 1.205 v comparator reference (note 5, 6) v ref version v50 1.475 1.520 1.565 v version v53 1.475 1.520 1.565 v version v55 1.235 1.275 1.315 v comparator hysteresis (note 6) v hy 2 mv v in input resistance r vin 100 m table 3 note 1: if input is connected to v ss , no reverse current will flow from the output to t he input, however the supply current specified will be sank by the output to supply the em6152a. note 2: regulation is measured at consta nt junction temperature using pul se testing with a low duty cycle. changes in output voltage du e to heating effects are covered in the specification for thermal regulation. note 3: the dropout voltage is defined as the input to output diff erential, measured with the input voltage equal to 5.0 v. note 4: output voltage temperature coefficient is defined as the change in output voltage a fter a change in power dissipation is appli ed, excluding load or line regulation effects. note 5: the comparator and the voltage regulator have separa te voltage references (see ?block diagram? fig. 3). note 6: the comparator reference is the power-down reset threshold. the power-on reset threshold equals the comparator reference volta ge plus the comparator hysteresis (see fig. 5).
r em6152a copyright ? 2006, em mi croelectronic-marin sa 5 www.emmicroelectronic.com 06/06, rev. b, prelim. timing characteristics v input = 13.5 v, i l = 100 a, c l = 10 f + 100 nf, c input = 22 f, t j = -40 to + 125 c, unless otherwise specified parameter symbol test conditions min. typ. max. units propagation delay tcl to output pins t dido 250 500 ns v in sensitivity t sen v inhigh =1.1 x v ref , v inlow =0.9 x v ref 0.5 3 15 s watchdog reset pulse period t wdrp tcl inactive t cw + t ow + t wdr ms version v30 power-on reset delay t por r osc = 116.9 k 1% 91.6 100 108.3 closed window time t cw 74 80 85.76 open window time t ow 37 40 42.88 ms watchdog time t wd 92.5 100 107.2 watchdog reset pulse width if no tcl t wdr 2.25 2.5 2.75 version v50 power-on reset delay t por r osc = 121.6 k 1% 91.6 100 108.3 closed window time t cw 74 80 85.76 open window time t ow 37 40 42.88 ms watchdog time t wd 92.5 100 107.2 watchdog reset pulse width if no tcl t wdr 2.25 2.5 2.75 version v53 power-on reset delay t por r osc = 23.2 k 1% 4.57 5.0 5.44 closed window time t cw 9.24 10 10.77 open window time t ow 18.48 20 21.54 ms watchdog time t wd 18.48 20 21.54 watchdog reset pulse width if no tcl t wdr 0.56 0.625 0.69 version v55 power-on reset delay t por r osc = 107.5 k 1% 91.6 100 108.3 closed window time t cw 74 80 85.76 open window time t ow 37 40 42.88 watchdog time t wd 92.5 100 107.2 ms watchdog reset pulse width if no tcl t wdr 2.25 2.5 2.75 watchdog reset pulse width in sleep mode t wdrs r osc off; r int =1m 2.8 3.2 3.6 watchdog reset pulse period in sleep mode t wdrps tcl inactive 750 1100 1450 table 4 for different values of t wd and r osc , see figures 9 to 12. timing waveforms watchdog timeout period fig. 4 t cw (closed window) t ow (open) t wd 80 120 time [ms] watchdog timer reset ( v30, v50 and v55 have similar ratios for t cw and t ow ) version v50: t cw (closed) t ow (open) 10 30 time [ms] watchdog timer reset version v53: for r osc =121.6 kohm for r osc =23.2 kohm t wd
r em6152a copyright ? 2006, em mi croelectronic-marin sa 6 www.emmicroelectronic.com 06/06, rev. b, prelim. voltage monitoring fig. 5 timer reaction fig. 6 combined voltage and timer reaction fig. 7 12 3 t cw - watchdog timer reset 3 correct tcl services en goes active low t ow t por v in v ref tcl res en t cw +t ow tcl too early condition: v output > 3v t tcl 12 3 - watchdog timer reset conditions: v in > v ref after power-up sequence t cw + t ow t cw t ow t cw + t ow t cw + t ow t wdr t cw t tcl t cw tcl res en 3 correct tcl services en goes active low timeout t tcl t sen t sen t sen t sen v hy v in v ref t por t por res conditions: v output > 3v no timeout
r em6152a copyright ? 2006, em mi croelectronic-marin sa 7 www.emmicroelectronic.com 06/06, rev. b, prelim. functional description v in monitoring the power-on reset and the power-down reset are generated as a response to the external voltage level applied on the v in input. the threshold voltage at which reset is asserted or released (v reset ) is determined by the external voltage divider between v dd and v ss, as shown on fig. 8. a part of v dd is compared to the internal voltage reference. to determine the values of the divider, the leakage current at v in must be taken into account as well as the current consumption of the divider itself. low resistor values will need more current, but high resistor values will make the reset threshold less accurate at high temperature, due to a possible leakage current at the v in input. the sum of the two resistors (r 1 + r 2 ) should stay below 500 k . the formula is: v reset = v ref x (1 + r 1 /r 2 ). example: choosing r 1 = 200 k and r 2 = 100 k gives v reset =4.56 v (typical) for version v50 and v53. at power-up the reset output ( res ) is held low (see fig. 5). when v in becomes greater than v ref , the res output is held low for an additional power-on-reset (por) delay t por (defined with the external resistor connected at r osc pin). the t por delay prevents repeated toggling of res even if v dd voltage drops out and recovers. the t por delay allows the microprocessor?s crystal o scillator time to start and stabilize and ensures correct reco gnition of the reset signal to the microprocessor. the res output goes active low generating the power- down reset whenever v in falls below v ref . the sensitivity or reaction time of the internal comparator to the voltage level on v in is typically 3 s. timer programming the on-chip oscillator allows t he user to adjust the power-on reset (por) delay t por and the watchdog time t wd by changing the resistor value of the external resistor r osc connected between the pin r osc and v ss (see fig. 8). the closed and open window times (t cw and t ow ) as well as the watchdog reset pulse width (t wdr ), which are t tcl dependent, will vary accordingly. the watchdog time t wd can be obtained with figures 9 to 12 or with the excel application em6151rescalc.xls available on em website. t por is equal to t wd with the minimum and maximum tolerances increased by 1% (for version 53, t por is one fourth of t wd ). note that the current consumption increases as the frequency increases. voltage regulator the em6152a has a 5 v, 150 ma, low dropout voltage regulator. the low supply current makes the em6152a particularly suitable for automotive systems which remain continuously powered. the input voltage range is 4 v to 40 v for operation and the input protection includes both reverse battery (42 v below ground) and load dump (positive transients up to 45 v). there is no reverse current flow from the output to the input when the input equals v ss . this feature is important for systems which need to implement (with capacitance) a minimum power supply hold-up time in the event of power failure. to achieve good load regulation a 10 f capacitor (or greater) is needed on the input (see fig. 8). tantalum or aluminum electrolytic are adequate for the 10 f capacitor; film types will work but are relatively expensive. many aluminum electrolytic have electrolytes t hat freeze at about ?30c, so tantalums are recommended for operation below ?25c. the important parameters of the 10 f capacitor are an effective series resistance of lower than 4 and a resonant frequency above 500 khz. a 10 f capacitor (or greater) and a 100 nf capacitor are required on the output to prevent oscillations due to instability. the spec ification of the 10 f capacitor is as per the 10 f capacitor on the input (see previous paragraph). the em6152a will remain stable and in regulation with no external load and the dropout voltage is typically constant as the input voltage fall below its minimum level (see table 2). these features are especially important in cmos ram keep-alive applications. power dissipation care must be taken not to exceed the maximum junction temperature (+125c). the power dissipation within the em6152a is given by the formula: p total = (v input ? v output ) i output + (v input ) i ss the maximum continuous power dissipation at a given temperature can be calculated using the formula: p max = ( 125c ? t a ) / r th(j-a) where r th(j-a) is the thermal resistance from the junction to the ambient and is specified in table 2. note that r th(j-a) given in table 2 assumes that the package is soldered to a pcb (see figure 16). the above formula for maximum power dissipation assumes a constant load (i.e. >100 s). the transient thermal resistance for a single pulse is much lower than the continuous value. can-bus sleep mode detector (version 55) when the microcontroller goes into a standby mode, it implies that it does not send any pulses on the tcl input of the em6152. after three reset pulse periods (t cw + t ow + t wdr ) on the res output, the circuit switches on an internal resistor of 1 m , and it will have a reset pulse of typically 3 ms every 1 second on the res output. when a tcl edge (rising or falling) appears on the tcl input or the power supply goes down and up, the circuit switches to the r osc . watchdog timeout period description the watchdog timeout period is divided into two periods, a closed window period (t cw ) and an open window period (t ow ), see fig. 4. if no pulse is applied on the tcl input during the open window period t ow , the res output goes low for a time t wdr . when a pulse is applied on the tcl input, the cycle is restarted with a close window period. for example if t wd = t por = 100ms, t cw = 80 ms, t ow = 40ms and t wdr = 2.5ms. when v in recovers after a drop below v ref , the pad res is set low for the time t por during which any tcl activation is disabled.
r em6152a copyright ? 2006, em mi croelectronic-marin sa 8 www.emmicroelectronic.com 06/06, rev. b, prelim. timer clearing and res action the watchdog circuit monitors the activity of the processor. if the user?s software does not send a pulse to the tcl input within the programmed open window timeout period a short watchdog res pulse is generated which is equal to t wdr (see fig. 6). with the open window constraint, new security is added to conventional watchdogs by monitoring both software cycle time and execution. should software clear the watchdog too quickly (incorrect cycle time) or too slowly (incorrect execution) it will cause the system to be reset. if software is stuck in a loop which includes the routine to clear the watchdog then a conventional watchdog would not make a system reset even though the software is malfunctioning; the circuit would make a system reset because the watchdog would be cleared too quickly. if no tcl signal is applied before the closed and open windows expire, res will start to generate square waves of period t wdrp = t cw + t ow + t wdr . the watchdog will remain in this state until the next tcl falling edge appears during an open window, or until a fresh power-up sequence. the system enable output, en , can be used to prevent critical control functions being activated in the event of the system going into this failure mode (see section ?enable- en output?). the res output must be pulled up to v output even if the output is not used by the system (see fig 8). combined voltage and timer action the combination of voltage and timer actions is illustrated by the sequence of events shown in fig. 6. on power-up, when the voltage at v in reaches v ref , the power-on-reset, por, delay is initialized and holds res active for the time of the por delay. a tcl pulse will have no effect until this power-on-reset delay is completed. when the risk exists that tcl temporarily floats, e.g. during t por , a pull-up to v output is required on that pin. after the por delay has elapsed, res goes inactive and the watchdog timer starts acting. if no tcl pulse occurs, res goes active low for a short time t wdr after each closed and open window period. a tcl pulse coming during the open window clears the watchdog timer. when the tcl pulse occurs too early (during the closed window), res goes active and a new timeout sequence starts. a voltage drop below the v ref level for longer than typically 3 s overrides the timer and immediately forces res active and en inactive. any further tcl pulse has no effect until the next power-up sequence has completed. enable - en output the system enable output, en , is inactive always when res is active and remains inactive after a res pulse until the watchdog is serviced correctly 3 consecutive times (i.e. the tcl pulse must come in the open window). after three consecutive services of the watchdog with tcl during the open window, the en goes active low. a malfunctioning system would be repeatedly reset by the watchdog. in a conventional system critical motor controls could be energized each time reset goes inactive (time allowed for the system to restart) and in this way the electrical motors driven by the system could function out of control. the circuit prevents the above failure mode by using the en output to disable the motor controls until software has successfully cleared the watchdog three times (i.e. the system has correctly re-started after a reset condition). typical application fig. 8 the important parameters of the 10 f input capacitor are an effective series resistance lower than 4 and a resonant frequency above 500 khz. regulated voltage (5v) gnd unregulated voltage res microprocessor motor controls en address decoder r 1 r 2 10uf 100nf 100k 22uf + + v ss input output r osc em6152a res en tcl v in
r em6152a copyright ? 2006, em mi croelectronic-marin sa 9 www.emmicroelectronic.com 06/06, rev. b, prelim. v30 r osc coefficient versus t wd at v dd = 5.0v and t j =-40 to +125c fig. 9 v50 r osc coefficient versus t wd at v dd = 5.0v and t j =-40 to +125c fig. 10 0.96 1.02 1.08 1.14 1.20 1.26 1.32 1.38 1.44 10 100 1000 twd [ms] rosc coefficient [kohm/ms] typ max min 0.96 1.02 1.08 1.14 1.20 1.26 1.32 1.38 1.44 10 100 1000 twd [ms] rosc coefficient [kohm/ms] typ max min
r em6152a copyright ? 2006, em mi croelectronic-marin sa 10 www.emmicroelectronic.com 06/06, rev. b, prelim. v53 r osc coefficient versus t wd at v dd = 5.0v and t j =-40 to +125c fig. 11 v55 r osc coefficient versus t wd at v dd = 5.0v and t j =-40 to +125c fig. 12 0.98 1.04 1.10 1.16 1.22 1.28 1.34 1.40 1.46 10 100 1000 twd [ms] rosc coefficient [kohm/ms] typ max min 0.86 0.92 0.98 1.04 1.10 1.16 1.22 1.28 1.34 10 100 1000 twd [ms] rosc coefficien t [kohm/ms] typ max min
r em6152a copyright ? 2006, em mi croelectronic-marin sa 11 www.emmicroelectronic.com 06/06, rev. b, prelim. typical maximum output current versus input voltage fig. 13 0 20 40 60 80 100 120 140 160 180 200 5 10152025303540 input voltage [v] output current [ma] exposed pad so-16 package botton slug soldered to pcb t a =25c t a =85c
r em6152a copyright ? 2006, em mi croelectronic-marin sa 12 www.emmicroelectronic.com 06/06, rev. b, prelim. package information dimensions of 8-pin soic package min nom max a 1.35 1.63 1.75 a1 0.10 0.15 0.25 b 0.33 0.41 0.51 c 0.19 0.20 0.25 d 4.80 4.94 5.00 e 3.80 3.94 4.00 e 1.27 h 5.80 5.99 6.20 l 0.40 0.64 1.27 2 3 4 5 6 7 8 h l 0 - 8 c e a1 a b e d dimensions in mm 1 fig. 14 dimensions of exposed pad so-16 package fig. 15 dual layer pcb fig. 16 em microelectronic-marin sa (em) makes no wa rranty for the use of its products, other than those expressly contained in the com pany's standard warranty which is detailed in em's general terms of sale located on the company's web site. em assumes no responsibili ty for any errors which may appear in this document , reserves the right to change devices or specifications detailed herein at any tim e without notice, and does not make any commitment to update the information contained herein. no licenses to patents or other intellectu al property of em are granted in connection with the sale of em pr oducts, expressly or by implicat ions. em's products are not auth orized for use as components in life support devices or systems. subject to change without notice dimensions in mm em6152a ex. pad so16 top layer em6152a ex. pad so16 bottom layer dimensions in mm min nom max a 1.43 1.55 1.68 a1 0.00 0.05 0.10 a2 1.43 1.50 1.58 b 0.35 0.41 0.49 c 0.19 0.20 0.25 d 9.80 9.93 9.98 e 3.81 3.94 3.99 e1.27 h 5.84 5.99 6.20 l 0.41 0.64 0.89 exposed pad: 3.56 x 2.29 mm

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